{"resultsPerPage":1,"startIndex":0,"totalResults":1,"format":"NVD_CVE","version":"2.0","timestamp":"2026-05-10T12:29:09.999","vulnerabilities":[{"cve":{"id":"CVE-2025-63384","sourceIdentifier":"cve@mitre.org","published":"2025-11-10T20:15:49.013","lastModified":"2026-02-05T15:25:19.137","vulnStatus":"Analyzed","cveTags":[],"descriptions":[{"lang":"en","value":"A vulnerability was discovered in RISC-V Rocket-Chip v1.6 and before implementation where the SRET (Supervisor-mode Exception Return) instruction fails to correctly transition the processor's privilege level. Instead of downgrading from Machine-mode (M-mode) to Supervisor-mode (S-mode) as specified by the sstatus.SPP bit, the processor incorrectly remains in M-mode, leading to a critical privilege retention vulnerability."},{"lang":"es","value":"Se descubrió una vulnerabilidad en RISC-V Rocket-Chip v1.6 y versiones anteriores, donde la instrucción SRET (Supervisor-mode Exception Return) no logra transicionar correctamente el nivel de privilegio del procesador. En lugar de bajar de categoría desde el modo Máquina (M-mode) a modo Supervisor (S-mode) según lo especificado por el bit sstatus.SPP, el procesador permanece incorrectamente en M-mode, lo que lleva a una vulnerabilidad crítica de retención de privilegios."}],"metrics":{"cvssMetricV31":[{"source":"134c704f-9b21-4f2e-91b3-4a467353bcc0","type":"Secondary","cvssData":{"version":"3.1","vectorString":"CVSS:3.1/AV:N/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N","baseScore":6.5,"baseSeverity":"MEDIUM","attackVector":"NETWORK","attackComplexity":"LOW","privilegesRequired":"LOW","userInteraction":"NONE","scope":"UNCHANGED","confidentialityImpact":"HIGH","integrityImpact":"NONE","availabilityImpact":"NONE"},"exploitabilityScore":2.8,"impactScore":3.6}]},"weaknesses":[{"source":"134c704f-9b21-4f2e-91b3-4a467353bcc0","type":"Secondary","description":[{"lang":"en","value":"CWE-266"}]}],"configurations":[{"nodes":[{"operator":"OR","negate":false,"cpeMatch":[{"vulnerable":true,"criteria":"cpe:2.3:a:chipsalliance:rocketchip:*:*:*:*:*:*:*:*","versionEndIncluding":"1.6","matchCriteriaId":"09DDD465-2972-437C-B35E-27B6733A70E1"}]}]}],"references":[{"url":"https://github.com/107040503/RISC-V-Vulnerability-Disclosure_SRET","source":"cve@mitre.org","tags":["Exploit","Third Party Advisory"]},{"url":"https://github.com/chipsalliance/rocket-chip.git","source":"cve@mitre.org","tags":["Product"]}]}}]}